Spice Options Setup

Spice has a number of options that can be set. These include options to set accuracy and convergence. This is covered in detail in the Spice3 manual.

Transient Simulation Speed And Accuracy

To optimize simulation speed and accuracy the following standard Spice3 options and transient options may be adjusted.

1 Spice Option "RELTOL" - default = 0.001 = 0.1%. This sets the relative tolerance of the solution in general.

2 Spice Option "TRTOL" - default = 1. Sets a relative internal time step for spice calculations

3 Transient run setup "MIN STEP SIZE" - Sets a manual minimum calculation time step, irrespective of internal step size requirements

RELTOL 0.1% is usually sufficient for a wide class of systems. The default TRTOL for Spice3 was 7. However, for many topologies this value results in unacceptable errors and so is defaulted to 1 in SuperSpice. MIN STEP SIZE should typically be set to at most a period/10 of any waveform in the schematic in order to obtain a smooth waveform.

Setting these options to small values will significantly slow the simulation down due to more simulation points being calculated, however this result in much higher accuracy of the results.

Complex systems such as SMPS (Switched mode power supplies) and Delta-Sigma converters often require the accuracy to be set to smaller than 100u and or TRTOL to be in the 1- 3 range. There have been arguments presented in the literature that setting a smaller RELTOL value is preferred to lower TRTOL, but this is not conclusive.

The summary is that some trial and error may be necessary in choosing "RELTOL" "TRTOL" and "MIN STEP SIZE" in order to obtain the optimum wave form accuracy and simulation speed. Ranges of a factor of 3 in speed may be expected in the setting of TRTOL, and 10,000s if the MIN STEP SIZE is unduly small.

Note: Do not run more cycles than is necessary!

Use transient run data to nodeset

This option allows the final voltage set of a prior TRAN run to be used as the starting solution point of the solutions of other analysis runs. The node voltages will be saved in a .NODESET file (name.tns) that will be loaded into the next simulation as an include file.

For example, if a DC sweep fails to converge, a TRAN run might. The final point TRAN data can then be used as the initial guess for the simulation engine in the DC run.

SuperSpice Specific Options

floatdata

Set "floatdata" to a non zero value to set the output data format to "floats" rather than "doubles". This will half the file size but restrict output values to +/-1e-37.

simwaittime

Set "simwaittime" to a non zero value to slow down the simulation. This is useful if component values are to be changed in real time.

ssdesi - Device Designer Current Accuracy option

Sets 1/accuracy directly, e.g. 10,000 = 0.01%

ssdesv - Device Designer Voltage Accuracy option

Sets 1/accuracy indirectly, dependant on final resistance value.

Simulation Setup

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